Sykatiya Technologies, believes in Technical Ability along with the Attitude of our highly talented team and reflects the same in the contributions to the customers’ project. Team comprises highly talented engineers and experts from Design Verification, DFT/Test, Physical Design and Analog Design for ASICs.
In this role, you will be part of the ASIC verification team responsible for functional verification of ASIC IPs. ASIC verification methodology employs state of the art techniques and tools, including coverage-driven constrained random verification and formal verification. Object-oriented architectures and frameworks are a fundamental part of how we design and implement our verification environments.
Expertise and Aptitude towards verifying functions such as image processing, video compression, and computer vision. As a verification engineer, you will also have the opportunity to learn about the algorithms behind the hardware.
We are looking for an experienced engineer with an exceptional talent for programming and a genuine interest in ASIC verification. Our verification environments are often quite elaborate, so you must have an aptitude for understanding, implementing, and maintaining complex software systems.
Prior experience in hardware verification using SystemVerilog, UVM, low power verification, and formal methods are desirable.
As a person, we believe you are analytical, systematic, and have attention to detail.
Sykatiya Technologies, believes in Technical Ability along with the Attitude of our highly talented team and reflects the same in the contributions to the customers’ project. Team comprises highly talented engineers and experts from Design Verification, DFT/Test, Physical Design and Analog Design for ASICs.